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[Other resource] 发布15个Altera的IP的源码

Description: ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
Platform: | Size: 49346 | Author: 汪旭 | Hits:

[Other resource] 15AlteraIPCODE

Description: 15个Altera的IP的源码，嵌入式开发必备-15 Altera IP source code, the embedded development required!
Platform: | Size: 49673 | Author: 罗军 | Hits:

[Embeded-SCM Develop] vga_IP

Description: altera 的vga ip核，可直接调用 在quartus中把库指向文件位置就可-altera the vga ip nuclear, can be directly called in the Quartus point in the database file location can be
Platform: | Size: 2048 | Author: 李涛 | Hits:

[VHDL-FPGA-Verilog] i2c_p_altera

Description: altera i2c slave ip核verilog 编写-altera i2c slave ip to prepare nuclear Verilog
Platform: | Size: 1583104 | Author: 1984taozi | Hits:

[VHDL-FPGA-Verilog] Example-b4-2

Description: Altera IP应用设计实例  “\Example-b4-2\Project”目录下为设计工程  “\Example-b4-2\Solution”目录下为正确的解决方案，仅供读者参考 -Altera IP Application Design
Platform: | Size: 394240 | Author: king | Hits:

[VHDL-FPGA-Verilog] AlteraSdramIP

Description: Altera Sdram IP 源码，VHDL写的-Altera Sdram IP source code, VHDL written
Platform: | Size: 781312 | Author: 张敏 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: Quartus中实现的DDS 使用的是altera提供的IP core-DDS achieved Quartus using IP core provided by altera
Platform: | Size: 83968 | Author: ray | Hits:

[Other] IPCamera

Description: IP Camera的硬件电路图。protel DXP 绘制。希望能给需要的朋友有所帮助。-IP Camera hardware circuit diagram. Drawing protel DXP. Hope that I can help a friend in need.
Platform: | Size: 439296 | Author: BOBO | Hits:

[VHDL-FPGA-Verilog] AlteraSdramIP

Description: Altera Sdram IP 源码.rar-Altera Sdram IP source code. Rar
Platform: | Size: 723968 | Author: hu71992 | Hits:

[Other] alter_ip_source_code

Description: 15个altera的ip的源码,对于altera ip核的研究有很大帮助-15 altera of the ip source, for the study of nuclear altera ip of great help to
Platform: | Size: 49152 | Author: 王奕 | Hits:

[VHDL-FPGA-Verilog] UP_IP_Library_80

Description: altera大学IP库，包含ps2、sdram、rs232等-altera University, IP libraries, including the ps2, sdram, rs232, etc.
Platform: | Size: 5476352 | Author: wcm | Hits:

[VHDL-FPGA-Verilog] CPU11111

Description: altera提供的sdram ip核例程，简单易懂。采用burst8模式。 -altera provided by the sdram ip core routines, easy to understand. Using burst8 model.
Platform: | Size: 1024 | Author: 张寒枫 | Hits:

[VHDL-FPGA-Verilog] cic

Description: altera 公司 quartusII 提供的cic ip ,文件版本是8.0-altera company quartusII provided cic ip, file version is 8.0
Platform: | Size: 7047168 | Author: tiantian | Hits:

[VHDL-FPGA-Verilog] fft_32K

Description: This example describes a 32K-point fast Fourier transform using the Altera FFT IP MegaCore. 描述了一个32K的点快速傅立叶变换（FFT） 。
Platform: | Size: 984064 | Author: Joey196t | Hits:

[VHDL-FPGA-Verilog] IP-Camera

Description: 基于Altera公司的FPGA设计的网络IP Camera方案，具有参考价值。-Altera s FPGA-based Network IP Camera solution designed with a reference value.
Platform: | Size: 559104 | Author: 王贤 | Hits:

[VHDL-FPGA-Verilog] SDRAM_ipcore_

Description: Altera SDRAM ip核详解-Altera SDRAM ip nuclear Detailed
Platform: | Size: 1664000 | Author: fangyuanyong | Hits:

[VHDL-FPGA-Verilog] fft_ug

Description: altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FPGA design engineers, students.
Platform: | Size: 1035264 | Author: zhangdong | Hits:

[VHDL-FPGA-Verilog] IP

Description: USB+UART+I2C+VGA+ARM7+MC8051 altera IP核-USB+UART+I2C+VGA+ARM7+MC8051 Verrlog VHDL
Platform: | Size: 3806208 | Author: 刘春焱 | Hits:

[Embeded-SCM Develop] Altera-LVDS的IP核设计详解

Description: 自己总结的Altera_LVDS的IP核的设计及仿真分析，非常使用，已在实际工程中应用到(Their summary of the Altera_LVDS IP kernel design and simulation analysis, very use, has been applied in practical engineering)
Platform: | Size: 3184640 | Author: 何波波 | Hits:

[Other Embeded program] Altera-LVDS_IP

Description: 自己总结的Altera_LVDS的IP核的设计及仿真分析，已在实际工程中应用到，并且带有源代码和仿真代码，总结的文档，非常有用。(My summary of the Altera_LVDS IP kernel design and simulation analysis, has been applied in practical engineering, and with source code and simulation code, summary of the document, very useful.)
Platform: | Size: 3191808 | Author: 何河 | Hits:
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